nilsschneider.de

Parsing opcodes was more difficult than I thought of, but that part is now completed.

Opcodes are, in general, defined as 24 bit words where, for parallel move instructions, the eight LSBs define the ALU operation while the 16 MSBs define the move instruction that is executed in parallel.

Non-parallel instructions instead use the full 24 bit range for the opcode/operand definition.

I still didn’t find out how to distinguish between a parallel instruction and a non-parallel instruction easily. So at the moment, the first instructions that are tested are the non-parallel ones.

Any suggestions for speeding this up are always welcome.

The basic setup of all the required hardware structures is completed.

There is memory, the DSP itself, registers, register definitions and all those things are now ready to be filled by calculations.

After reading some days ago, that TC Electronic ceases further development for the Powercore platform, an old idea came up again and I started working on it: Emulating the DSP 56300 from Motorola/Freescale that is used in the Powercore and a lot of other synthesizers.

The interesting part for me personally is: Will it be fast enough? There is a lot of discussion about that in the forums out there. I will try and see if I can do a “proof-of-concept” to see if it will work.

Any tips/suggestions are always welcome. Test code, too

I’ll post news about the emulation progress regularily here.