The DSP 56300 emulation took a big step forward this weekend. I implemented a lot of ALU instructions and many others, too.
To be able to handle the different register types (24,48,56 bits) more efficiently, I created a template class that respects all the different conversions when moving data between different registers during compilation time. This results in code that is solid and fast aswell.
To help me debugging, I created a little app that shows me register states and allows me to handle execution control:
Meanwhile, the first instructions are executed by the emulator.
The hardware stack is working (not the software stack extension though). A lot of move instructions run fine, jump and branch instructions, too. The do instruction is already supported aswell.
I have to rethink the implementation of the registers, though. It turns out that all those different operands in the move instructions are quite complicated, some of them place the data in the MSBs of the register (fractional numbers), some of them in the LSBs (integers).
It may get clearer to me once I started implementing more of the ALU operations. The only supported ones at the moment are bit manipulation instructions and comparison. The CCR bits get updated as they should and Bcc already works.
Wenn ihr mehr über den Status der DSP 56300 Emulation erfahren wollt, verfolgt mein englisches Blog: hier entlang
Parsing opcodes was more difficult than I thought of, but that part is now completed.
Opcodes are, in general, defined as 24 bit words where, for parallel move instructions, the eight LSBs define the ALU operation while the 16 MSBs define the move instruction that is executed in parallel.
Non-parallel instructions instead use the full 24 bit range for the opcode/operand definition.
I still didn’t find out how to distinguish between a parallel instruction and a non-parallel instruction easily. So at the moment, the first instructions that are tested are the non-parallel ones.
Any suggestions for speeding this up are always welcome.
The basic setup of all the required hardware structures is completed.
There is memory, the DSP itself, registers, register definitions and all those things are now ready to be filled by calculations.