DSP 56300 emulator now open source! Feel free to test it

DSP 56300 now open source, hosted on bitbucket

I decided to release my 56300 emulator project as open source. I added the whole project to bitbucket, feel free to download it here:

https://bitbucket.org/nilsschneider/dsp56300

More Instructions / Implementing the Instruction Cache

Meanwhile, most instructions are implemented, some are still missing though.

At the moment, I implement the Instruction Cache

Because the DSP 56362 that is used in the Powercore (Firewire) allows access to the instruction cache through P-memory, the instruction cache has to be emulated aswell.

That’s something I didn’t plan to do, the plock/pfree and other cache instructions are currently left empty because I thought I didn’t have to implement them. Well, things have changed, so they will be implemented properly and the instruction cache, too.

Stay tuned….

Big emulation progress – many ALU instructions and more

The DSP 56300 emulation took a big step forward this weekend. I implemented a lot of ALU instructions and many others, too.

To be able to handle the different register types (24,48,56 bits) more efficiently, I created a template class that respects all the different conversions when moving data between different registers during compilation time. This results in code that is solid and fast aswell.

To help me debugging, I created a little app that shows me register states and allows me to handle execution control:

DSP 56300 Emulation Test App

The first running instructions

Meanwhile, the first instructions are executed by the emulator.

The hardware stack is working (not the software stack extension though). A lot of move instructions run fine, jump and branch instructions, too. The do instruction is already supported aswell.

I have to rethink the implementation of the registers, though. It turns out that all those different operands in the move instructions are quite complicated, some of them place the data in the MSBs of the register (fractional numbers), some of them in the LSBs (integers).

It may get clearer to me once I started implementing more of the ALU operations. The only supported ones at the moment are bit manipulation instructions and comparison. The CCR bits get updated as they should and Bcc already works.